发布于 2026-08-26
英文原文
功率QFN封装及铜夹相关薄芯片组装工艺的认证、组装维护与工艺改进工程师
Sr Staff Process Engineer
ルネサス エレクトロニクス
| 职种 | 工程 | 雇用形态 | — |
|---|---|---|---|
| 工作地点 | Bangkok, th | 薪资 | 面议 |
职位概要
该职位负责功率QFN(PQFN)封装及铜夹相关薄芯片组装工艺的认证、维护与持续改进。主要职责包括:设计封装并开发工艺,为SPS(智能功率级)产品及相关模块认证PQFN封装;提升量产规模并认证所需供应源;负责产线维护,提升组装良率、产能、质量并降低成本;与测试/产品工程师、质量及运营团队协作,处理内外部客户反馈与问题;管理产品生命周期管理文档至最新状态;与供应商开展变更管理以维持或提升产能与成本;与质量和可靠性团队合作,满足内部、行业及客户标准;作为新产品导入(NPI)到量产转移的关键制造工程接口;管理支持生产的OSAT及代工合作关系。任职要求:机械、材料、物理、化学或应用科学学位;具备薄晶圆处理及SPS焊接贴装工艺的材料/工艺/设计工艺工程或封装开发经验;熟悉PQFN/QFN、模块SMT封装及引线封装的质量与可靠性要求;了解SPC及统计分析软件(如JMP);具备较强的英语人际沟通能力、分析、书面沟通及演示能力;能有效管理大型项目。加分项:铜夹、薄芯片、功率QFN封装开发知识;产品从开发到量产转移经验;支持NPI到量产经验;超薄晶圆处理及SPS焊接贴装工艺经验;Taiko晶圆经验。Renesas为嵌入式半导体解决方案提供商,全球团队超21000名工程师,遍布30多个国家,服务于汽车、工业、基础设施及IoT领域。公司文化为TAGIE(透明、敏捷、全球、创新、创业),提供有竞争力的薪酬福利。Renesas是平等机会雇主,致力于多元与包容。
职位描述
Job Description Qualify, Assembly Sustenance and Process Improvements on Power QFN package and Cu Clip related thin die assembly processes. Key Responsibilities Design package, develop processes to qualify PQFN (Power Quad Flat-No lead) packages for SPS (Smart Power Stage) products & its associated modules. Ramp up manufacturing volume and qualify required sources. Responsible for line sustaining. Improve assembly yield, capacity, quality and costs. Address internal and external customer feedback / issues collaborating with Test / Product Engineers, Quality & Operations organization. Manage Product Lifecycle Management documents to the latest status. Conduct change-management with suppliers to sustain / improve capacity and cost. Partner with Quality and Reliability teams to meet internal, industry, and customer standards. Serve as the key manufacturing engineering interface for NPI-to-production transfers Manage OSAT and contract manufacturing relationships supporting production Qualifications Degree in Mechanical, Material, Physics, Chemistry or Applied Sciences. Experienced in process engineering or package development of material/process/design of thin wafer handling and SPS solder attach processes. Knowledge of quality and reliability requirements for PQFN/QFN, Module SMT packages, and leaded packages. Knowledge of SPC and statistical analysis software (such as JMP). Strong interpersonal and communication skills in English. Strong analytical, written communication and presentation skills. Able to manage large projects effectively. Nice to haves: Cu Clip, Thin Die, Power QFN Package development knowledge Experience transitioning products from Development to Production Experience supporting NPI to Mass Production Experienced in process engineering or package development of material/process/design of ultra-thin wafer handling and SPS solder attach processes Experienced in Taiko wafer Additional Information Renesas is an embedded semiconductor solution provider driven by its Purpose, To Make Our Lives Easier . With a global team of over 21,000 engineers and problem solvers in more than 30 countries, we offer the opportunity to work on world‑leading technology for Automotive, Industrial, Infrastructure, and IoT, shaping a safer, healthier, greener, and smarter future. At Renesas, TAGIE is our culture, grounded in being Transparent, Agile, Global, Innovative, and Entrepreneurial. It shapes how we work, grow and deliver on our purpose together. This collaborative spirit and mindset drive our semiconductor technology to transform industries and impact millions of lives. We believe in rewarding our employees with a competitive benefits package alongside their salary. More information will be provided during the hiring process. Are you ready to join our team and shape the future with us? Renesas Electronics is an equal opportunity and affirmative action employer, committed to supporting diversity and fostering a work environment free of discrimination on the basis of sex, race, religion, national origin, gender, gender identity, gender expression, age, sexual orientation, military status, veteran status, or any other basis protected by law. For more information, please read our Diversity & Inclusion Statement .