在招职位 0
订阅提醒 登录
发布于 2026-10-08 英文原文

封装开发工程师(功率SiP/模块、晶圆级与倒装芯片封装)

(Sr.) Staff Package Design Engineer - MIS substrate/FC expose die (Experienced in Power or Gan is requried)

ルネサス エレクトロニクス

职种工程 雇用形态—
工作地点Taipei, tw 薪资面议

职位概要

该职位负责为瑞萨电子设计并开发满足其封装需求的封装与互连方法,涵盖功率SiP/模块、晶圆级、倒装芯片、多芯片模块及功率器件封装,具备GaN相关封装经验者优先。主要职责包括:对消费类、工业及汽车功率应用进行封装技术认证;评估、选择并认证合适的材料、工艺及组装外包商(OSAT)或合同制造商(CM);与OSAT/CM合作开发并运行DOE以优化工艺、建立工艺规范,并在量产早期监控和解决工艺问题,确保仅向客户交付高质量产品;与产品团队及可靠性团队合作,在规定时间内完成新封装和工艺认证,并与市场、产品、质量及运营团队协作处理内外部客户投诉,以支持业务增长;确保顺利过渡到量产并实施爬坡监控;参与封装路线图开发并专注执行,持续发展并维护在功率SiP/模块、晶圆级封装、倒装芯片互连及面板级封装方面的技术专长;建立并维护封装设计规则。任职资格:物理、化学、机械、电气或材料工程专业博士/硕士/学士学位;10年以上封装开发相关经验,重点涉及功率SiP/模块、晶圆级及倒装芯片封装;深入理解功率SiP/模块、晶圆级/倒装芯片封装方法、组装工艺知识、认证方法、SPC及统计分析软件;具备较强的人际沟通、分析及演示能力;了解引线键合及多芯片模块技术者优先。瑞萨电子是一家嵌入式半导体解决方案提供商,全球团队超过21,000名工程师,遍布30多个国家,致力于汽车、工业、基础设施及物联网领域的世界领先技术。公司文化TAGIE强调透明、敏捷、全球、创新和创业精神,并提供具有竞争力的薪酬福利。瑞萨电子是平等机会和积极行动雇主,致力于支持多样性并营造无歧视的工作环境。

职位描述

Job Description Job Summary • Design and develop package and interconnect methods for Renesas’s packaging needs in the areas of Power SiP/modules, wafer level, flip-chip, multi-chip module and power device packaging, GaN related PKG is a plus. • Package technologies qualification for consumer & industrial power as well as automotive power applications. Key Responsibilities • Benchmark, select and qualify suitable materials, processes and assembly subcontractors (OSAT) or contract manufacturers (CM). • Work with OSAT/CM to develop, run DOE to optimize processes, establish process spec & monitor and resolve process issues early in the production to ensure only parts with superior quality shipped to customer. • Work with Product groups and Reliability team, qualify new packages and processes within required time frame & further address internal and external customer complains working with peers of Marketing, Product groups, Quality and Operations organization to satisfy growth in businesses. • Ensure smooth transition into production & implement ramp up monitor. • Participate in packaging roadmap development & focus on execution, develop and maintain technical expertise on advances and innovations in power SiP/modules, wafer level packaging, flip chip interconnects and panel level package. • Establish & maintain package design rules. Qualifications • Doctorate/Masters / Bachelor’s degree in Physics, Chemistry, Mechanical, Electrical or Materials Engineering. • >10 years of relevant experience in package development emphasizing power SiP/module, wafer level & flip-chip packaging. • Strong understanding of power SiP/modules, wafer level/flip-chip packaging methods, assembly process knowledge, qualification methods, SPC and statistical analysis software. • Strong interpersonal and communication skills. • Strong analytical and presentation skills. • Knowledge of wire-bonding & multi-chip module technologies is a plus. Additional Information Renesas is an embedded semiconductor solution provider driven by its Purpose, To Make Our Lives Easier . With a global team of over 21,000 engineers and problem solvers in more than 30 countries, we offer the opportunity to work on world‑leading technology for Automotive, Industrial, Infrastructure, and IoT, shaping a safer, healthier, greener, and smarter future. At Renesas, TAGIE is our culture, grounded in being Transparent, Agile, Global, Innovative, and Entrepreneurial. It shapes how we work, grow and deliver on our purpose together. This collaborative spirit and mindset drive our semiconductor technology to transform industries and impact millions of lives. We believe in rewarding our employees with a competitive benefits package alongside their salary. More information will be provided during the hiring process. Are you ready to join our team and shape the future with us? Renesas Electronics is an equal opportunity and affirmative action employer, committed to supporting diversity and fostering a work environment free of discrimination on the basis of sex, race, religion, national origin, gender, gender identity, gender expression, age, sexual orientation, military status, veteran status, or any other basis protected by law. For more information, please read our Diversity & Inclusion Statement .