高级模拟工程师

Job Description We are seeking a highly motivated Senior Analog Engineer to join our Analog Design team. In this role, you will be responsible for the design, simulation, verification, and development of high-performance analog and mixed-signal integrated circuits for automotive, industrial, and power management applications. This role requires strong technical expertise in analog circuit design, excellent problem-solving skills, and the ability to collaborate across multidisciplinary, global engineering teams. Key Responsibilities Circuit Design & Optimization: Perform transistor-level circuit design, simulation, and optimization for high-performance analog and mixed-signal blocks. Block-Level Architecture: Design and develop precision references and bias circuits, operational amplifiers, comparators, LDO regulators, oscillators, timing circuits, data converter support circuits, and power management/isolation-related analog circuits. Layout & Physical Design Support: Support IC floorplanning and work closely with layout engineers to ensure robust analog layout implementation. Silicon Validation: Analyze silicon measurement results, conduct lab evaluation, and drive necessary design improvements. Qualification & Reliability: Support product qualification, characterization, and reliability testing activities. Qualifications Education: M.S. or Ph.D. in Electrical Engineering (or B.S. with equivalent, demonstrated technical expertise). Technical Fundamentals: Deep understanding of CMOS device physics and analog circuit fundamentals. EDA Tools: Hands-on experience with Cadence Virtuoso, Spectre, and standard circuit simulation tools. Process & Reliability: Practical knowledge of semiconductor process technologies and reliability considerations. Soft Skills: Excellent technical documentation skills, strong verbal communication, and the ability to work effectively in a cross-functional, global team environment. Preferred Qualifications Experience with GaN (Gallium Nitride) device applications and driver design. Experience with isolated IC design methodologies and high-voltage power management circuits. Additional Information The expected annual pay range for this position is $135,000 - $160,000. This position is also eligible for bonus opportunities. Please note that the final offer amount will be dependent on geographic location, applicable experience, and skillset of the candidate. Renesas is an embedded semiconductor solution provider driven by its Purpose, To Make Our Lives Easier . With a global team of over 21,000 engineers and problem solvers in more than 30 countries, we offer the opportunity to work on world‑leading technology for Automotive, Industrial, Infrastructure, and IoT, shaping a safer, healthier, greener, and smarter future. At Renesas, TAGIE is our culture, grounded in being Transparent, Agile, Global, Innovative, and Entrepreneurial. It shapes how we work, grow and deliver on our purpose together. This collaborative spirit and mindset drive our semiconductor technology to transform industries and impact millions of lives. We believe in rewarding our employees with a competitive benefits package alongside their salary. More information will be provided during the hiring process. Are you ready to join our team and shape the future with us? Renesas Electronics is an equal opportunity and affirmative action employer, committed to supporting diversity and fostering a work environment free of discrimination on the basis of sex, race, religion, national origin, gender, gender identity, gender expression, age, sexual orientation, military status, veteran status, or any other basis protected by law. For more information, please read our Diversity & Inclusion Statement . Renesas Electronics deals with dual-use technology that is subject to U.S. export controls regulations. Under these regulations it may be necessary for Renesas to obtain U.S. government export license prior to release of technology to certain persons. The decision whether or not to file or pursue an export license application is at the sole discretion of Renesas.