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发布于 2026-10-22 英文原文

IC封装设计工程师

Staff IC Package Design Engineer

ルネサス エレクトロニクス

职种工程 雇用形态—
工作地点Kaohsiung, tw 薪资面议

职位概要

招聘资深IC封装设计工程师,需精通WLCSP、BGA、FCCSP、SiP、QFN/DFN及引线框架类封装(SOP、T/M/V/SSOP、QFP、PDIP、SOT23)等多种半导体封装类型。主要职责:使用Cadence APD/SiP和AutoCAD按公司标准与设计规则创建封装布局;与产品组、封装开发、封装文档、封装仿真、IC布局设计、模拟/射频/数字设计、组装工程、项目管理及OSAT等跨职能团队协作;主导封装设计从概念、可行性到量产的全过程,提供技术方案并解决设计难题;优化封装设计以满足电气、机械、散热及可制造性要求。必备条件:电气、电子或相关工程专业学士/硕士/博士学位;10年以上IC封装设计经验;精通上述封装技术及Cadence APD/SiP与AutoCAD;深入理解复杂封装结构与可制造性;优秀的沟通与团队协作能力;具有与OSAT及全球跨职能团队合作经验。加分项:熟悉Cadence Sigrity和/或Ansys工具;具备电气建模与仿真知识;了解SI/PI分析及封装优化。Renesas为汽车、工业、基础设施及IoT领域提供嵌入式半导体解决方案,全球30多个国家拥有逾21000名工程师,文化核心为TAGIE(透明、敏捷、全球、创新、创业),提供有竞争力的薪酬福利。

职位描述

Company Description We are seeking a highly experienced IC Package Design Engineer with extensive expertise across a broad range of semiconductor package types. The ideal candidate is proficient in industry-standard package design tools and possesses a strong understanding of package structures, performance, and manufacturability. Experience with electrical modeling and simulation tools is highly desirable. Success in this role requires strong communication and collaboration skills, as well as the ability to work effectively within a global cross-functional engineering team. Job Description 1. Design IC semiconductor packages, including WLCSP, BGA, FCCSP, SiP, QFN/DFN, and leaded leadframe-based packages (SOP, T/M/V/SSOP, QFP, PDIP, SOT23), to meet manufacturing and reliability requirements. 2. Create package layouts using Cadence APD/SiP and AutoCAD in compliance with company standards and design rules. 3. Collaborate with cross-functional teams including Product Group, Package Development, Package Documentation, Package Simulation, IC Layout Design, Analog/RF/Digital Design, Assembly Engineering, Project Management and OSATs to ensure successful package execution. 4. Drive package design activities from concept and feasibility through production, providing technical solutions and resolving design challenges. 5. Optimize package designs to meet electrical, mechanical, thermal, and manufacturability requirements. Qualifications Must-Have Qualifications: Degree (Bachelor’s, Master’s, or PhD) in Electrical, Electronics, or a related engineering discipline. 10+ years of IC package design experience. Expertise in WLCSP, BGA, FCCSP, SiP, QFN/DFN, and leadframe-based package technologies. Proficiency in Cadence APD/SIP and AutoCAD. Strong understanding of package design, including complex structures, and manufacturability. Excellent communication and teamwork skills. Experience working with OSATs and global cross-functional teams. Good-to-Have Qualifications: Experience with Cadence Sigrity and/or Ansys tools. Knowledge of electrical modeling and simulation. Familiarity with SI/PI analysis and package optimization. Additional Information Renesas is an embedded semiconductor solution provider driven by its Purpose, To Make Our Lives Easier . With a global team of over 21,000 engineers and problem solvers in more than 30 countries, we offer the opportunity to work on world‑leading technology for Automotive, Industrial, Infrastructure, and IoT, shaping a safer, healthier, greener, and smarter future. At Renesas, TAGIE is our culture, grounded in being Transparent, Agile, Global, Innovative, and Entrepreneurial. It shapes how we work, grow and deliver on our purpose together. This collaborative spirit and mindset drive our semiconductor technology to transform industries and impact millions of lives. We believe in rewarding our employees with a competitive benefits package alongside their salary. More information will be provided during the hiring process. Are you ready to join our team and shape the future with us? Renesas Electronics is an equal opportunity and affirmative action employer, committed to supporting diversity and fostering a work environment free of discrimination on the basis of sex, race, religion, national origin, gender, gender identity, gender expression, age, sexual orientation, military status, veteran status, or any other basis protected by law. For more information, please read our Diversity & Inclusion Statement .