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发布于 2026-10-05 英文原文

版图设计工程师

Staff Layout Design Engineer

ルネサス エレクトロニクス

职种工程 雇用形态—
工作地点Sophia Antipolis, fr 薪资面议

职位概要

招聘有经验的模拟版图设计工程师,负责DC-DC转换器、控制器和驱动器等产品的版图设计。要求电气与计算机工程学士或硕士学历,6年以上模拟版图设计经验,熟悉DRC、LVS、封装等流程。需具备从模块级到全芯片的模拟版图设计能力,能独立完成电荷泵、比较器、放大器、带隙基准、线性稳压器等模拟电路的布局规划与版图设计,深入掌握布局规划、单元版图及模拟版图匹配技术,并具备EM与可靠性设计知识。需与全球跨版图团队协作,交付高质量版图。优先条件包括:熟悉IC工艺(尤其是BCD节点)、封装与量产测试,熟悉先进IC CAD工具,具备SKILL编码能力及Python、Perl、TCL等脚本语言能力,精通Virtuoso XL、Calibre DRC/LVS/PEX、PVS、R3D等工具。公司为瑞萨电子,全球拥有超过21000名工程师,业务覆盖汽车、工业、基础设施和物联网领域,文化强调透明、敏捷、全球化、创新和创业精神,提供有竞争力的薪酬福利,是平等机会雇主。

职位描述

Job Description Looking for an experienced and talented Layout Design Engineer where in the candidate will get to work on a wide range of exciting products such as DC-DC converters, Controllers and Drivers. Essential Functions: Experienced in all aspects of Analog layout design from block level to full chip with a demonstrated history in driving design innovation and best practices. Should have the ability to work independently with little supervision to floorplan and layout typical analog circuits such as charge pumps, comparators, amplifiers, bandgaps, linear regulators etc take complete ownership to drive all aspects within the committed schedule. Must have deep knowledge in floor planning, leaf cell layout and analog layout matching techniques along with designing for EM and reliability. Must be a natural team player , will collaborate with cross layout teams over the world to deliver high quality layouts. Qualifications Minimum Requirements: Bachelor’s or Master’s degree in Electrical and Computer engineering 6+ years in Analog Layout Design and associated flows for DRC, LVS, Packaging Additional Preferred Qualifications Solid understanding of IC processing (preferably BCD nodes), packaging and production test along with familiarity with advanced IC CAD tools SKILL coding and proficiency in any of the scripting languages such as Python, Perl, TCL etc Expertise in the required CAD tools (Virtuoso XL / Calibre DRC, LVS & PEX / PVS / R3D) Work closely in collaboration with colleagues in design and layout to minimize need for rework. Follow methodology guidelines to ensure easy portability of IP across designs. Additional Information Renesas is an embedded semiconductor solution provider driven by its Purpose, To Make Our Lives Easier . With a global team of over 21,000 engineers and problem solvers in more than 30 countries, we offer the opportunity to work on world‑leading technology for Automotive, Industrial, Infrastructure, and IoT, shaping a safer, healthier, greener, and smarter future. At Renesas, TAGIE is our culture, grounded in being Transparent, Agile, Global, Innovative, and Entrepreneurial. It shapes how we work, grow and deliver on our purpose together. This collaborative spirit and mindset drive our semiconductor technology to transform industries and impact millions of lives. We believe in rewarding our employees with a competitive benefits package alongside their salary. More information will be provided during the hiring process. Are you ready to join our team and shape the future with us? Renesas Electronics is an equal opportunity and affirmative action employer, committed to supporting diversity and fostering a work environment free of discrimination on the basis of sex, race, religion, national origin, gender, gender identity, gender expression, age, sexual orientation, military status, veteran status, or any other basis protected by law. For more information, please read our Diversity & Inclusion Statement .