高级封装工程师

Job Description This senior technical contributor role will design, develop and resolve issues on advanced packages for high performance power semiconductor products with high reliability, low cost and mass production robustness by collaborating with multiple departments (Design, Assembly, Test, Reliability Engineering, Quality, Sales and Marketing Team) and suppliers/OSAT’s around the world. Key responsibilities: Responsible for packaging design and technology development on advanced high power discrete, muti-chip, stacked and module packages. Responsible for defining package design rules, process flow and material set for new products including automotive power packages. Analyze stress, thermal capability and electrical performance with in-depth knowledge of thermal-mechanical and electro-chemical interactions. Define BOM, assembly process development, assembly specification and qualification per standard requirements. Run process DOE’s to define optimum process windows and material characteristics on existing assembly processes and for new package development. Resolve package reliability, assembly issues and improving existing assembly processes & materials working with OSATs across Asia to achieve target yield & quality and zero out customer returns/complaints. Collaborate with device design / product engineering teams and external high volume packaging vendors to achieve qualification target and ensure flawless time to market execution. Define and drive reliability testing and qualifications plans together with reliability engineers that meet Jedec/AEC and automotive quality standards of new power packages. Technical project management on key core technology projects includes managing timeline, material readiness, manufacturability and quality and timely reporting of progress. Transfer knowledge developed in the NPI process to the sustaining team to ensure a smooth transition to production. Collaborate with assembly engineering sustaining team to resolve technical issues, improving the yield, cost, cycle time and drive continuous improvement initiatives. Collaborate with cross functional teams to help develop a packaging roadmap aligned with the company’s product strategy and revenue targets. Qualifications BS Degree in Electrical Engineering, Mechanical Engineering and Material Science Minimum experience 15 years in semiconductor packaging technology with hands-on design for manufacturability (Process Development & Package Development Engineer). Excellent people & leadership skills and experience in dealing with and managing OSATs. Substantial experience in Power discrete products with multi die & stacked die configuration, Ag sintered die bonding, Al, Cu/PCC bonding, Cu clip, flip chip LGA and QFN technologies and low stress vacuum molding. Can perform actual hands-on process capability analysis & risk prediction, design of experiments, variability charting, analysis of variance/means comparison/T-tests using SAS.JMP or mini tab software. Experience with latest material technologies: Sapphire substrate sawing, conductive & nonconductive high thermal die attach film, Ag sintered epoxies, clip bonding, ribbon wire bonding, high CTI, high thermal, high Tg, low stress fine filler molding compounds. Experience leading a project (program management). Experience with IC packaging design rules, tools (including AutoCAD). Familiarity of package related design/simulation software (thermos-mechanical, thermal and electrical). Excellent problem-solving skills, an analytical approach to tasks and understanding of SPC techniques Extensive experience collaborating with OSAT vendors/suppliers, Experience in building a supply chain of vendors and service providers. Experience in SMT or passive integrated package assembly, multichip, stacked dies packages and assembly automation. Experience with packaging processes: Wafer Back-grinding, Wafer Dicing, flip chip bonding, die attach (Solder and epoxy), wire-bonding (Cu and Al bonding), molding, Tin plating, and package singulation. Experience in qualification of high voltage/power packages. Qualification in very high humidity and corrosive environment. Knowledge of AEQ reliability requirements, APQP automotive development process and JEDEC/IPC design standards. Strong in English oral and written communication skills. Additional Information Renesas is an embedded semiconductor solution provider driven by its Purpose, To Make Our Lives Easier . With a global team of over 21,000 engineers and problem solvers in more than 30 countries, we offer the opportunity to work on world‑leading technology for Automotive, Industrial, Infrastructure, and IoT, shaping a safer, healthier, greener, and smarter future. At Renesas, TAGIE is our culture, grounded in being Transparent, Agile, Global, Innovative, and Entrepreneurial. It shapes how we work, grow and deliver on our purpose together. This collaborative spirit and mindset drive our semiconductor technology to transform industries and impact millions of lives. We believe in rewarding our employees with a competitive benefits package alongside their salary. More information will be provided during the hiring process. Are you ready to join our team and shape the future with us? Renesas Electronics is an equal opportunity and affirmative action employer, committed to supporting diversity and fostering a work environment free of discrimination on the basis of sex, race, religion, national origin, gender, gender identity, gender expression, age, sexual orientation, military status, veteran status, or any other basis protected by law. For more information, please read our Diversity & Inclusion Statement .