摄像头与视觉子系统架构师

Job Description Own the Camera and Vision subsystem architecture for next-generation high-end MPU platforms, translating product use cases, customer requirements, workloads, and Camera/Vision technologies into scalable and implementable HW/SW architectures. Act as the architectural bridge between Product, Camera/Vision Core Technology, SoC Architecture, and HW/SW development teams. The role operates at both technical and leadership levels, working directly with Product Line and Engineering leaders, from Director through Vice President level, to formulate and present architecture proposals, explain technical and business trade-offs, and drive alignment on major product and technology decisions Work as part of a global, multidisciplinary organization developing next-generation application-processor platforms for advanced vision, multimodal, and physical-AI applications, and guide the Camera/Vision subsystem from early product definition through architecture, implementation, integration, and product validation. The scope covers the broader Camera-to-Vision and Camera-to-AI processing chain, including multi-camera acquisition, image processing, vision preprocessing, AI integration, data movement, synchronization, control, and end-to-end system behavior. The role contributes to application-processor platforms with demanding product constraints for performance, power, cost, scalability, real-time behavior, and software continuity. Own the end-to-end Camera and Vision subsystem architecture for next-generation MPU platforms and derived products. Translate product use cases, customer requirements, workloads, and Camera/Vision technologies into an end-to-end subsystem architecture, including processing and control flows, HW/SW/FW partitioning, blocks and accelerators, interfaces, buffering, memory usage, software components, and verification requirements. Work with Product and Camera/Vision Core Technology teams to translate algorithmic requirements into practical architectures supporting machine-vision effectiveness and, where applicable, human-viewing image quality. Define subsystem performance and resource requirements and collaborate with SoC and subsystem architects on workload modeling, resource allocation, interfaces, system-level performance analysis, and architecture trade-offs under realistic concurrent workloads. Define a scalable architecture across product tiers and generations, evaluating internal and third-party technologies and IP based on technical fit, differentiation, reuse, implementation risk, and roadmap needs. Drive the architecture definition through implementation, integration, silicon bring-up, performance characterization, and product validation, ensuring alignment with use cases, requirements, and architectural intent. Work with Product and customer-facing teams to understand emerging use cases, customer requirements, competitive developments, and market trends, and help shape the MPU product and technology roadmap. Drive technical alignment and decision making across global Product, Core Technology, SoC architecture, HW and SW teams. Develop and present architecture proposals, investment and implementation alternatives, technical and product tradeoffs, and clear recommendations to Product Line and Engineering leaders, including Director and Vice President level stakeholders. Build alignment, address concerns, and drive timely decisions on product architecture, technology selection, roadmap direction, and major implementation choices. Qualifications Essential Extensive experience in Camera, Imaging, or Computer Vision systems, with deep knowledge of modern Camera and ISP pipelines and a proven track record of owning subsystem architecture for production SoCs or similarly complex embedded platforms. Strong understanding of image sensors, sensor interfaces, image-processing flows, multi-camera systems, and the architectural implications of traditional and AI/ML-based Vision algorithms. Demonstrated ability to translate use cases, workloads, and algorithms into HW/SW/FW architecture, interfaces, performance budgets, specifications, and validation requirements, including complex partitioning and design trade-offs. Strong understanding of Camera/Vision software and SoC integration, including sensor and ISP control, buffer and memory management, runtime orchestration, DMA, bandwidth, latency, synchronization, interconnect behavior, and interfaces to Vision and AI runtimes. Experience defining subsystem KPIs, resource budgets, workload models, and validation methods, and guiding an architecture from concept through silicon and product validation. Ability to structure incomplete requirements, establish sound assumptions, evaluate alternatives objectively, and drive complex technical decisions to closure. Strong technical leadership and communication skills, with demonstrated ability to develop a technically rigorous proposal, communicate complex architecture and business tradeoffs clearly, respond effectively to challenge, and drive alignment across global cross-functional teams and senior technical and business stakeholders. Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, Computer Science, Imaging Science, or a related technical discipline. Extensive professional experience in embedded systems, semiconductor products, Camera/Imaging, Computer Vision, or SoC architecture. Demonstrated experience defining and delivering Camera/Vision subsystem architecture for production products. Desirable Experience with high-performance or multi-camera SoCs and Camera pipelines feeding AI/NPU or heterogeneous-compute workloads. Experience with industrial, robotics, automotive, surveillance, or other real-time Vision systems. Experience with Camera/Vision workload modeling, architecture simulation, or quantitative performance analysis. Experience with custom image-processing or Vision accelerators and heterogeneous SoCs combining ISP, CPU, GPU, NPU, memory, and display. Experience with imaging science, machine-vision image quality, or third-party Camera/ISP/Vision IP integration. Customer-facing architecture experience and familiarity with relevant safety, security, reliability, or diagnostic requirements. Additional Information Renesas is an embedded semiconductor solution provider driven by its Purpose, To Make Our Lives Easier . With a global team of over 21,000 engineers and problem solvers in more than 30 countries, we offer the opportunity to work on world‑leading technology for Automotive, Industrial, Infrastructure, and IoT, shaping a safer, healthier, greener, and smarter future. At Renesas, TAGIE is our culture, grounded in being Transparent, Agile, Global, Innovative, and Entrepreneurial. It shapes how we work, grow and deliver on our purpose together. This collaborative spirit and mindset drive our semiconductor technology to transform industries and impact millions of lives. We believe in rewarding our employees with a competitive benefits package alongside their salary. More information will be provided during the hiring process. Are you ready to join our team and shape the future with us? Renesas Electronics is an equal opportunity and affirmative action employer, committed to supporting diversity and fostering a work environment free of discrimination on the basis of sex, race, religion, national origin, gender, gender identity, gender expression, age, sexual orientation, military status, veteran status, or any other basis protected by law. For more information, please read our Diversity & Inclusion Statement .