发布于 2026-11-05
英文原文
半导体封装工艺工程师(REXFET)
NPI Senior Process Engineer
ルネサス エレクトロニクス
| 职种 | 工程 | 雇用形态 | — |
|---|---|---|---|
| 工作地点 | Telok Panglima Garang, my | 薪资 | 面议 |
职位概要
该职位负责为REXFET产品开发、优化、验证并建立稳健的半导体封装工艺,涵盖树脂连筋切割(Resin Tie Bar Cut)、条带研磨(Strip Grinding)以及切割成型打标(Cut Form Mark)工艺。主要职责包括:制定并执行工艺开发计划、工程与验证批次及工艺验证活动;建立工艺参数、规格、控制限与验收标准;评估工艺可行性、识别制造风险并在量产前实施预防措施;审核工艺能力、良率表现、缺陷趋势与验证结果;编写技术报告、工艺文档与验证总结;支持安全投产并确保量产发布前解决关键工艺问题。需与生产、设备工程、质量保证、产品工程、材料工程及NPI项目管理等跨职能团队紧密协作,并与设备和材料供应商评估新技术。要求工程学士学位(机械、机电一体化或相关专业),5年以上半导体封装、包装或制造工程经验,优先考虑打标、切筋成型及条带研磨领域;具备DOE、SPC、工艺能力分析、FMEA及结构化根因分析知识;熟练使用Excel和PowerPoint;具备良好的沟通与跨职能协作能力。具有REXFET、MOSFET、功率分立器件或功率半导体封装经验,以及Keyence激光打标机、多余树脂切割、打标程序设置、机器视觉检测等实操经验者优先。Renesas提供具有竞争力的薪酬福利,致力于多元包容的工作环境。
职位描述
Job Description To develop, optimize, qualify, and establish robust semiconductor assembly processes for REXFET products, covering Resin Tie Bar Cut, Strip Grinding & Cut Form Mark process. The role is responsible for process development, optimization, qualification, technical problem-solving, and manufacturing readiness to ensure new products meet quality, reliability, productivity, and cost requirements. The engineer will work closely with NPI project management, Production, Process Engineering, Equipment Engineering, Quality Assurance, Product Engineering, Material Engineering, and other cross-functional teams to ensure successful product introduction and smooth transfer to mass production. Key Responsibilities A. NPI Process Development and Qualification Develop, establish, and optimize assembly process conditions for new REXFET products. Prepare and execute process development plans, engineering & qualification builds, and process validation activities. Establish process parameters, specifications, control limits, and acceptance criteria. Evaluate process feasibility, identify potential manufacturing risks, and implement preventive actions before mass production. Review process capability, yield performance, defect trends, and qualification results. Prepare technical reports, process documentation, and qualification summaries. Support safe launch activities and ensure all critical process issues are resolved before mass production release. B. Multi-Process Engineering Responsibilities Resin Tie bar cut - Develop and optimize Resin Tie bar cut process for REXFET Strip Grinding - Develop and optimize Strip Grinding process for REXFET Cut Form Mark - Develop and optimize Cut Form Mark and other related process control for Marking & Cutting. C. Cross-Functional Collaboration Collaborate with Production, Equipment Eng, QA, Product Eng, Material Eng, and other relevant departments Work with equipment and material suppliers to evaluate new technologies and improvement opportunities. Provide technical support during engineering builds, qualification builds, troubleshooting, and production ramp-up. Coordinate process readiness, material availability, and documentation before qualification and mass production. D. Documentation and Mass Production Transfer Prepare and maintain process specifications, SOPs, work instructions, process flow documents, and risk assessments. Maintain engineering records, process parameter histories, DOE results, and qualification reports. Support PFMEA reviews and implementation of appropriate process controls. Define critical-to-quality parameters and monitoring requirements. Qualifications Bachelor's Degree in Engineering (Mechanical, Mechatronics, or related disciplines). Minimum 5 years experience in semiconductor assembly, packaging, or manufacturing engineering is preferred in Marking, Trim & Form and Strip Grinding. Candidates with relevant experience in multiple assembly processes, particularly power semiconductor or power discrete packaging, will have an added advantage. Skills and Knowledge Strong analytical, troubleshooting, and problem-solving skills. Good understanding of semiconductor assembly processes and process interactions. Knowledge of DOE, SPC, process capability analysis, FMEA, and structured root cause analysis. Ability to interpret engineering data, identify process risks, and implement effective corrective actions. Proficiency in Microsoft Excel and PowerPoint for data analysis, technical reporting, and presentation. Good communication and cross-functional collaboration skills. Ability to manage multiple NPI activities and meet project milestones. Added Advantages Experience in REXFET, MOSFET, power discrete, or power semiconductor package assembly. Hands-on experience in Keyence Laser Marker, Excess Resin Cut and Trim & Form processes. Experience in Marking Program Setup, Machine Vision Inspection, Dieset Maintenance and package failure analysis. Experience in new product qualification, process transfer, safe launch, and mass production ramp-up. Experience in process development using DOE and optimization of multi-step assembly processes using JMP analysis tools. Additional Information Renesas is an embedded semiconductor solution provider driven by its Purpose, To Make Our Lives Easier . With a global team of over 21,000 engineers and problem solvers in more than 30 countries, we offer the opportunity to work on world‑leading technology for Automotive, Industrial, Infrastructure, and IoT, shaping a safer, healthier, greener, and smarter future. At Renesas, TAGIE is our culture, grounded in being Transparent, Agile, Global, Innovative, and Entrepreneurial. It shapes how we work, grow and deliver on our purpose together. This collaborative spirit and mindset drive our semiconductor technology to transform industries and impact millions of lives. We believe in rewarding our employees with a competitive benefits package alongside their salary. More information will be provided during the hiring process. Are you ready to join our team and shape the future with us? Renesas Electronics is an equal opportunity and affirmative action employer, committed to supporting diversity and fostering a work environment free of discrimination on the basis of sex, race, religion, national origin, gender, gender identity, gender expression, age, sexual orientation, military status, veteran status, or any other basis protected by law. For more information, please read our Diversity & Inclusion Statement .