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发布于 2026-11-03 英文原文

高级数字设计工程师

Senior Digital Design Engineer

ルネサス エレクトロニクス

职种工程 雇用形态—
工作地点意大利卡塔尼亚 薪资该职位的预期年薪范围为37,000至50,000欧元。该职位还可获得奖金。

职位概要

该职位为高级数字设计工程师,加入Renesas位于意大利卡塔尼亚的团队,参与面向AI、云和数据中心应用的下一代电源管理解决方案。主要职责包括:使用Verilog/SystemVerilog设计和实现数字模块,将功能需求转化为可综合的RTL;参与微架构定义;与验证和模拟工程师协作开发和验证数字功能;执行仿真、调试设计问题并支持子系统及芯片级集成;运行lint和时钟域交叉检查;支持综合、时序分析和硅验证。任职要求:电子工程、计算机工程或相关专业学位;约4年以上数字IC设计工作经验;具备Verilog或SystemVerilog及RTL仿真调试的实践经验;扎实理解同步数字设计、有限状态机、时钟和复位策略;熟悉综合、时序约束和时钟域交叉概念;具备协作精神、愿意提问并有学习动力;良好的英语沟通能力。加分项:混合信号IC或电源管理应用、数字控制算法或信号处理、I²C/SPI/PMBus等通信接口、Python/Tcl等脚本语言、FPGA原型验证或实验室验证。工作环境为协作型国际团队,提供成长机会。年薪范围37,000至50,000欧元,另设奖金。

职位描述

Job Description We are looking for a Senior Digital Design Engineer to join our Renesas team in Catania, contributing to next-generation power management solutions for AI, Cloud and Data Center applications. This role is ideal for someone with proven working experience in digital IC design who enjoys hands-on engineering, wants to take ownership of their work and is curious to explore new technical challenges. What you will do Design and implement digital blocks in Verilog/SystemVerilog, translating functional requirements into robust, synthesizable RTL. Contribute to microarchitecture definition, discussing implementation choices with experienced designers. Work closely with verification and analog engineers to develop and validate digital functionality. Perform simulations, debug design issues and support integration at subsystem and chip level. Run lint and clock domain crossing checks, and help resolve issues. Support synthesis, timing analysis and silicon validation as you develop broader experience across the design flow. Qualifications A degree in Electronic Engineering, Computer Engineering or a related discipline. Around 4+ working experience in digital IC design. Practical experience with Verilog or SystemVerilog and RTL simulation and debugging. A solid understanding of synchronous digital design, finite state machines, clocking and reset strategies. Familiarity with synthesis, timing constraints and clock domain crossing concepts. A collaborative approach, willingness to ask questions and motivation to learn. Good communication skills in English. Nice to have Experience in any of the following would be welcome, but is not required: Mixed-signal ICs or power management applications. Digital control algorithms or signal processing. Communication interfaces such as I²C, SPI or PMBus. Python, Tcl or other scripting languages. FPGA prototyping or laboratory validation. Additional Information You will contribute to technically challenging products in a collaborative, international environment, with support from experienced colleagues and opportunities to grow your responsibilities. The expected annual pay range for this position is €37,000–€50,000. Please note that the final offer will depend on factors such as geographic location, relevant experience, and the candidate’s skill set. This role is also eligible for a bonus. Renesas is an embedded semiconductor solution provider driven by its Purpose, To Make Our Lives Easier . With a global team of over 21,000 engineers and problem solvers in more than 30 countries, we offer the opportunity to work on world‑leading technology for Automotive, Industrial, Infrastructure, and IoT, shaping a safer, healthier, greener, and smarter future. At Renesas, TAGIE is our culture, grounded in being Transparent, Agile, Global, Innovative, and Entrepreneurial. It shapes how we work, grow and deliver on our purpose together. This collaborative spirit and mindset drive our semiconductor technology to transform industries and impact millions of lives. We believe in rewarding our employees with a competitive benefits package alongside their salary. More information will be provided during the hiring process. Are you ready to join our team and shape the future with us? Renesas Electronics is an equal opportunity and affirmative action employer, committed to supporting diversity and fostering a work environment free of discrimination on the basis of sex, race, religion, national origin, gender, gender identity, gender expression, age, sexual orientation, military status, veteran status, or any other basis protected by law. For more information, please read our Diversity & Inclusion Statement .